#ifndef __BL_CONFIG_H
#define __BL_CONFIG_H

/* BootLoader version */

#define MAJOR_VERSION           1
#define MINOR_VERSION           0
#define REVISION                0

#define TBOOT_VERSION           ((MAJOR_VERSION & 0xFF) << 24 | (MINOR_VERSION & 0xFF) << 16 | (REVISION & 0xFFFF))
#define TBOOT_VERSION_STR       "1.0.0"

/* Step 1: BootLoader Defines */

#define TBOOT_SYSTEM_ENTRY      0x08000000
#define TBOOT_STACK_ADDR        0x20000000

#define BOOT_MAGIC_NUMB                   0x1A4C4254
#define BOOT_FLASH_BLOCKSIZE              4*1024
/* BootLoader hold pin */
#define BOOT_HOLD_PIN                     GET_PIN(H, 3)
/* application partition name */
#define BOOT_APP_PARTITION_NAME           "app"
/* default app bin file fullpath */
#define BOOT_APP_FILE_PATH                "/mnt/update.tbl"
/* instrument model; 6 character max */
#define BOOT_INSTRUMENT_MODEL             "5053"

#define TBOOT_COMP_HEAD_SZ          4
#define TBOOT_READ_BUFF_SZ          4*1024    // MAY BE 1024 2048 4096max
#define TBOOT_COMP_BUFF_SZ          4*1024    // MAY BE 4096min
#define TBOOT_QLZ_PADD_SZ           QLZ_BUFFER_PADDING
#define TBOOT_FLZ_PADD_SZ           FASTLZ_BUFFER_PADDING(TBOOT_READ_BUFF_SZ)

/* Step 2: BootLoader algorithm */

//#define TBOOT_USING_AES256
//#define TBOOT_USING_QUICKLZ
//#define TBOOT_USING_FASTLZ

#if defined (TBOOT_USING_QUICKLZ) && defined(TBOOT_USING_FASTLZ)
#error "quicklz & fastlz can be defined only one"
#endif

/* AES256 encryption algorithm option */
#define BOOT_ENCRYP_AES_IV  	"CRITICALERROR!!!"
#define BOOT_ENCRYP_AES_KEY 	"CRITICALERROR!!!REBOOT SYSTEM!!!"

/* Step 3: BootLoader interface */

//#define TBOOT_USING_USB
#define TBOOT_USING_YMODEM
//#define TBOOT_USING_HTTP

#if defined (TBOOT_USING_USB) || defined(TBOOT_USING_YMODEM) || defined(TBOOT_USING_HTTP)
#else
#error "at least define one media"
#endif

#ifdef TBOOT_USING_YMODEM

#define RYM_DEVICE_NAME  "uart1"

#ifdef RT_USING_SERIAL_V2
#define RT_SERIAL_CONFIG_YMODEM               \
{                                             \
    BAUD_RATE_115200,    /* 115200 bits/s */  \
    DATA_BITS_8,         /* 8 databits */     \
    STOP_BITS_1,         /* 1 stopbit */      \
    PARITY_NONE,         /* No parity  */     \
    BIT_ORDER_LSB,       /* LSB first sent */ \
    NRZ_NORMAL,          /* Normal mode */    \
    RT_SERIAL_RX_MINBUFSZ, /* rxBuf size */   \
    RT_SERIAL_TX_MINBUFSZ, /* txBuf size */   \
    0                                         \
}
#else
#define RT_SERIAL_CONFIG_YMODEM            \
{                                          \
    BAUD_RATE_115200, /* 115200 bits/s */  \
    DATA_BITS_8,      /* 8 databits */     \
    STOP_BITS_1,      /* 1 stopbit */      \
    PARITY_NONE,      /* No parity  */     \
    BIT_ORDER_LSB,    /* LSB first sent */ \
    NRZ_NORMAL,       /* Normal mode */    \
    2048,             /* Buffer size */  \
    RT_SERIAL_FLOWCONTROL_NONE, /* Off flowcontrol */ \
    0                                      \
}
#endif // RT_USING_SERIAL_V2
#endif // TBOOT_USING_YMODEM

#ifdef TBOOT_USING_HTTP
#define HTTP_OTA_BUFF_LEN         1024
#define GET_HEADER_BUFSZ          1024
#define GET_RESP_BUFSZ            1024
#define HTTP_OTA_DL_DELAY         (10 * RT_TICK_PER_SECOND)

#define HTTP_OTA_URL              "http://192.168.2.50/rtthread.tbl"//PKG_HTTP_OTA_URL
#endif // TBOOT_USING_HTTP

#endif // __BL_CONFIG_H
